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CMU is a Cadence University Program Member

Cadence design tools are used in a variety of undergraduate and graduate classes to provide practical experience in the design of integrated circuits and systems. Additionally, they are used by several research groups in the design of chips integrating analog, digital, RF and MEMS circuitry, with foundry fabrication through EuroPractice, GlobalFoundries, LFoundry, MOSIS, Samsung, ST Microelectronics, TowerJazz, and UMC. This page links to the various informational web pages maintained in these classes and research groups for the benefit of the first time user.



Cadence design tools are available for use by all students, staff and post-docs that are active in academic and research activities in ECE. Others who desire access must contact first. Benchmark studies of the software tools is expressly forbidden. Cadence supported documentation must not be copied from the Cadence AFS tree to user directories. For additional help, manuals, training and expert questions please ask the students, TAs and professors who teach the courses listed below or who are affiliated with the research labs listed below.


Only Cadence products are listed in this page. For other CAD tools or other products visit the applications page in this wiki.


Fundamentals of Semiconductor Devices
This class introduces the student to the operation and fabrication of commonly used integrated circuit devices such as the diode, the bipolar junction transistor and the MOS transistor. Some of the labs in this class are based on the circuit simulation tools within the Cadence Custom IC tool suite.
Microelectronic Circuits
This class introduces the students to basic microelectronic circuits, how they are fabricated, the basic devices which are used to build circuits and how to analyze both analog and digital circuits. The labs in the class are design oriented, utilizing schematic entry and simulation using tools from the Cadence Custom IC tool suite.
Analysis and Design of Analog Circuits
This class develops the student's ability to analyze circuits that include ideal and non-ideal operational amplifiers, diodes, bipolar junction transistors and MOS transistors. The labs in the class are design oriented, and schematic entry and simulation are critical steps to completing the labs in time. The lab manuals which describe the use of the Cadence Custom IC tools can be found by logging into Blackboard and entering the Guest Users section.
Analysis and Design of Digital Circuits
This class develops the student's ability to design a small chip using both synthesis-based and custom design flows, and involves circuit simulation with Spectre, logic simulation with Verilog, and layout generation with Virtuoso. An excellent lab manual is maintained by the TA's.
Introduction to Computer Architecture
This class develops the student's ability to design and simulate register-transfer-level models of superscalar architectures using Verilog.
Advanced Digital Integrated Circuit Design
This class focuses on the design of high-performance digital CMOS circuits. Students use Cadence's custom design flows, including transistor-level circuit simulation with Spectre, logic simulation with Verilog, layout generation with Virtuoso and extraction with Assura.
Analog Integrated Circuit Design
This class develops the student's ability to design analog integrated circuits through several design problems. The class uses the Cadence generic physical design kit, schematic composition in Composer, netlisting with the Analog Design Environment, circuit simulation with Spectre, and layout generation with Virtuoso and NeoCell. The lab manuals can be found by logging into Blackboard and entering the Guest Users section.
RFIC Design and Implementation
This class focuses on the design techniques for the analog circuits interfacing between digital systems and the real world. The focus of the class over the years has included data converters, switched capacitor filters, and digital communications channels. Practical design experience is developed through several paper design projects that use Composer, Analog Design Environment, Spectre and SpectreRF. Additional information can be found at the Blackboard web site.
Advanced Digital Integrated Circuit Design
This class covers the design process of VLSI CMOS circuits in nanoscale technologies. All the major steps in the design process, which include system, logic, circuit and layout design are covered. Cadence tools are used in the class and augmented with tools developed by CMU graduate students. One or more of the completed projects will be submitted for fabrication.
Digital Systems Testing and Testable Design
This class examines the theory and practice of fault analysis, test generation and design for testability in digital ICs and systems. Cadence test tools such as the Encounter platform are used in the homework and projects in this course.


Several research thrusts within the Center for Silicon System Implementation routinely use the Cadence design tools for taping out chips to silicon foundries. Listed below are links to some of the internal web pages regarding the Cadence design tools maintained by these groups:

Known Problems & Solutions

The Cadence FAQ may be a good place to start.

GLIBC_2.0 not defined in file

Affected versions: All versions bellow 5.1.14

Affected DKs: All

Affected OS: Suse 9.3

Summary: When starting Cadence the following error appears "/usr/cds/ic-5.0/tools/dfII/bin/icfb.exe: relocation error: /usr/cds/ic-5.0/tools/dfII/bin/icfb.exe: symbol errno, version GLIBC_2.0 not defined in file with link time reference." Then Cadence software exits. This happens because older versions of Cadence don't like the new 2.6 Linux kernel. Fix: Before starting Cadence software set the environment variable LD_ASSUME_KERNEL to 2.4.1.

    If using tcsh shell, setenv LD_ASSUME_KERNEL 2.4.1
    If using bash shell, LD_ASSUME_KERNEL=2.4.1; export LD_ASSSUME_KERNEL


Affected versions: All

Affected DKs: st065 v3.0

Affected OS: All

Summary: When starting Cadence the following error appears "Mandatory Shell Environment Variable opusdbtype is not correctly set." Then a segmentation fault. Fix: Before starting Cadence software set the environment variable opusdbtype to empty string.

    If using tcsh shell, setenv opusdbtype
    If using bash shell, opusdbtype=""; export opusdbtype

Lost in file system

Affected Versions: All

Affected DKs: All

Affected OS: Suse 9.3

Summary: When starting Cadence, the software reports an error message "Lost in file system." The working directory is set to a junk path. Fix: Make sure the directory Cadence is being started from has list (l) permissions for system:anyuser. To do this, run this command in the directory Cadence is being started from.

     fs sa . system:anyuser l

Cadence Start Up Scripts

Getting a Cadence tool to start typically involves setting several environment variables and then launching the tool. Many of the legacy scripts in ECE were developed in csh while more recent versions are being developed in bash.

If you are unfamiliar with basic UNIX shell scripting we recommend that you take take the time to learn the fundamentals. For the purpose of creating Cadence startup scripts the minimum requirements are understanding how to set and export and use environment variables, create comments, make your script executable.

There are many online resources that cover the basics of shell scripting. Below is a short list:

Example Script

# variables that are common to most instances

# location of the Cadence License export

# specify that the tool should run in 64 bit mode export CDS_AUTO_64BIT=ALL

# create a variable to hold the path to the top level directory # for your tool. This allows you to update other parts of the script # simply by changing single variable export CDSHOME=/afs/ece/support/cds/share/image/usr/cds/ic-6.17.710

# add the tool to your PATH export PATH=$CDSHOME/tools/bin:$CDSHOME/tools/dfII/bin:$PATH

# we would like to use assura as part of this session # by setting ASSURAHOME and adding ASSURA to our PATH that option # should be enabled in the virtuoso menu export ASSURAHOME=/afs/ece/support/cds/share/image/usr/cds/assura-4.15.001-617 export PATH=$PATH:$ASSURAHOME/tools/assura/bin

# start the tool virtuoso

Additional Considerations

Cadence is a suite of tools that can be changed used either individually or together. Some of the more specialized tools will have additional environment variables that need to be set or considered when creating your script.

Additionally, as updates happen within the ECE environment some tools may need some helper variables added to enable them to function. An example of this happened when we moved from SuSE to RHEL6 or from RHEL6 to RHEL7. During startup the tool tests a variety of things to see which version of the OA Library Manager should be started. One of those tests checks the version of the computer's operating system. If a supported version cannot be found then the tool will exit with an error and you must take additional steps to get things running again.

For example, when we migrated to RHEL6 the version of IC that was commonly in use, ic-6.16.090, did not have support for anything beyond RHEL5. Typically tools will still function correctly with a newer operating system but need to be told which library to use. This can be done by overriding the search for the OA version and specifying it:

export OA_UNSUPPORTED_PLAT=linux_rhel50_gcc44

OA_UNSUPPORTED_PLAT tells the tool to use the version of OA specified, in this case linux_rhel50_gcc44, if it cannot determine which version to use in the standard way.

This is just one example of an additional environment variable. There are many that can be put to use and they are typically described in the tool documentation.


For additional help, please mail, and your question will be forwarded to members of the ECE community that are known to be familiar with the Cadence tools.

Cadence is a registered trademark of Cadence Design Systems, Inc., 2655 Seely Avenue, San Jose, CA 95134.

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